An improved 15-level asymmetrical multilevel inverter with reduced switch count

• Main Authors: Sarwer, Z., Siddique, M.D., Sarwar, A., Mekhilef, Saad
• Format: Article
• Published: Springer Science 2021
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.um.edu.my/35511/
• Institution: Universiti Malaya

This paper discusses a new and modified circuit topology of a 15-level multilevel inverter having the advantage of lower switch count. The presented topology is having asymmetrical configuration. The superiority of the proposed topology is proved by the fact that it requires lower switches for generating same output levels and at the same time, it is also having lower value of reverse blocking voltage of switches. The detailed comparison with other topologies is explained and shown in tabulated form. The simulation results for different R and RL loading conditions and also for different modulation index are shown in paper. MATLAB/SIMULINK is used for the simulation. Hardware results are also discussed in the paper to validate the simulation results. These results are taken with an experimental prototype. A brief summary is also presented in the last section of the presented work. © 2021, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.