Emerging nanoelectronics device design exploration incorporating vertical impact-ionization mosfet and strained (SiGe) technology

• Main Author: Ismail Saad
• Format: Research Report
• Language: English
• Published: Universiti Malaysia Sabah 2013
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: https://eprints.ums.edu.my/id/eprint/24974/1/Emerging%20nanoelectronics%20device%20design%20exploration%20incorporating%20vertical%20impact-ionization%20mosfet%20and%20strained%20%28SiGe%29%20technology.pdf; https://eprints.ums.edu.my/id/eprint/24974/
• Institution: Universiti Malaysia Sabah

Miniaturization of semiconductor devices beyond sub-lO0nm has commenced several problems for further scaling. Low subthreshold voltage, reduced carrier mobility, and increased leakage currents were identified to be the paramount issues that leads to high power consumption and heating. The Impact Ionization MOSFET (IMOS) device has evolved to attract increasing attention for its ability to overcome these problems. The IMOS device works on the principle of avalanche breakdown mechanism that gives very good subthreshold slopes of 20mV/decade, but at high supply voltage. Hence, to bring down the supply voltage as well as to obtain low threshold voltage and subthreshold voltage, the Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET (VESIMOS) has been successfully developed in this study. VESIMOS device integrates vertical structure concept of IMOS and strained SiGe technology. The VESIMOS has been designed and simulated using Silvaco Technology Computer Aided Design (TCAD) tools for both device process {ATHENA) and characterization (ATLAS) respectively. The transfer characteristics of VESIMOS showed an inverse proportionality of supply voltage and subthreshold voltage due to lower breakdown strength of Ge content. However, the subthreshold voltage is in direct proportion to the leakage current. The subthreshold voltage, S=l0mV/dec was obtained at threshold voltage, VTH=0.9V, with supply voltage, Vo5=1.75V. This VTH was found to be 40% lower than the Si-vertical IMOS device's VTH, The output characteristics of VESIMOS found that the device goes into saturation for supply voltage more than 2.SV, attributed to the presence of Germanium (Ge) that has high and symmetric impact ionization rates. In addition, VESIMOS electron mobility was found to be improved by 40% compared to Si-vertical IMOS, due to the presence of the compressive strain. Consequently, it is also revealed that an increase in strain will also increase mobility and reduce further the threshold voltage. However, the increase in strain layer thickness {T SIGe), resulted in an increase of threshold voltage and lowered the mobility. This is due to the strain relaxation in the SiGe layer. In addition, it is also found that at high source-drain doping concentration (S/D=2x1018/cm3), the threshold voltage dropped to 0.88V, with supply voltage of 1.75V. This is due to high electric field effect in the channel at high doping concentration, which is contrary to the doping effects of conventional MOSFET.