High speed 8-bits x 8-bits Wallace Tree multiplier

• Main Author: Tajul Hamimi Harun
• Other Authors: Norina Idris (Advisor)
• Format: Learning Object
• Language: English
• Published: Universiti Malaysia Perlis 2008
• Subjects: Multipliers (Mathematical analysis); Multipliers; Wallace Tree multiplier; Altera Quartus II; High-speed multiplier; Verilog (Computer hardware description language)
• Online Access: http://dspace.unimap.edu.my/xmlui/handle/123456789/1937
• Institution: Universiti Malaysia Perlis

This final year project (FYP) is to analyze the design of Wallace Tree multiplier. For simplicity, unsigned operands are chosen and main focus on the short word widths commonly used in most applications: an 8-bit multiplier. Before this era, multiplier that used low power supply or multiplier that h...