Analysis of flip flop design using nanoelectronic single electron transistor
Link to publisher's homepage at http://ijneam.unimap.edu.my/
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Universiti Malaysia Perlis (UniMAP)
2017
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my.unimap-498162017-11-21T01:23:33Z Analysis of flip flop design using nanoelectronic single electron transistor Rajasekaran, S. Sundari, G. Logic Circuits Coulomb Blockage Nanoelectronics Single Electron Device (SED) Flip-flop Link to publisher's homepage at http://ijneam.unimap.edu.my/ Single Electron Transistor (SET) is a nanoelectronic device that operates under the controlled mode of tunnelled individual electrons. In this paper, a comparative analysis was performed employing SET based D-Flip flop with conventional logic D-flip flop. SET is eminent nanoscale devices that have low power dissipation, high speed and performance. The flip flop design was simulated using SIMON simulator and the stability of its operation was analysed applying the Monte-Carlo method that represented stability with low power dissipation and matched the functionality of traditional CMOS devices. 2017-09-28T07:46:54Z 2017-09-28T07:46:54Z 2017 Article International Journal of Nanoelectronics and Materials, vol.10 (1), 2017, pages 21-28 1985-5761 (Printed) 1997-4434 (Online) http://dspace.unimap.edu.my:80/xmlui/handle/123456789/49816 en Universiti Malaysia Perlis (UniMAP) |
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| language |
English |
| topic |
Logic Circuits Coulomb Blockage Nanoelectronics Single Electron Device (SED) Flip-flop |
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Logic Circuits Coulomb Blockage Nanoelectronics Single Electron Device (SED) Flip-flop Rajasekaran, S. Sundari, G. Analysis of flip flop design using nanoelectronic single electron transistor |
| description |
Link to publisher's homepage at http://ijneam.unimap.edu.my/ |
| format |
Article |
| author |
Rajasekaran, S. Sundari, G. |
| author_facet |
Rajasekaran, S. Sundari, G. |
| author_sort |
Rajasekaran, S. |
| title |
Analysis of flip flop design using nanoelectronic single electron transistor |
| title_short |
Analysis of flip flop design using nanoelectronic single electron transistor |
| title_full |
Analysis of flip flop design using nanoelectronic single electron transistor |
| title_fullStr |
Analysis of flip flop design using nanoelectronic single electron transistor |
| title_full_unstemmed |
Analysis of flip flop design using nanoelectronic single electron transistor |
| title_sort |
analysis of flip flop design using nanoelectronic single electron transistor |
| publisher |
Universiti Malaysia Perlis (UniMAP) |
| publishDate |
2017 |
| url |
http://dspace.unimap.edu.my:80/xmlui/handle/123456789/49816 |
| _version_ |
1643802826300719104 |