Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits

Delay circuits; Flip flop circuits; Aliasing; Applied voltages; Average values; Circuit size; D flip flops; Memristor; Multiple response; Physically unclonable functions; Memristors

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Bibliographic Details
Main Authors: Loong J.T.H., Nor Hashim N.A., Hamid F.A.
Other Authors: 57191483831
Format: Conference Paper
Published: Institute of Electrical and Electronics Engineers Inc. 2023
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Institution: Universiti Tenaga Nasional
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spelling my.uniten.dspace-233422023-05-29T14:39:39Z Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits Loong J.T.H. Nor Hashim N.A. Hamid F.A. 57191483831 57193493621 6603573875 Delay circuits; Flip flop circuits; Aliasing; Applied voltages; Average values; Circuit size; D flip flops; Memristor; Multiple response; Physically unclonable functions; Memristors The memristor, short for memory resistor, is the fourth fundamental passive circuit element, whereby it can remember the resistance based on the last applied voltage. The memristor is used in the Physically Unclonable Function (PUF), which has potential for hardware security. To improve the performance of the memristor-based arbiter PUF, two modifications were made on the design, which are extracting multiple response bits from various stages in the delay paths in order to increase resistance against attacks, and using the SR latch rather than the D flip-flop as the arbiter because of better input-to-output path symmetry in the SR latch to minimize repsonse bias as well as circuit size and overhead. The proposed memristor-based APUF were simulated with two, three, and four memristors per stage. The memristor-based APUF performance were analyzed in terms of uniqueness, uniformity, and bit-aliasing, where the average values obtained were 49.32%, 53.21%, and 53.21%, respectively. The proposed memristor-based APUF performs well as expected. � 2016 IEEE. Final 2023-05-29T06:39:39Z 2023-05-29T06:39:39Z 2017 Conference Paper 10.1109/SCORED.2016.7810033 2-s2.0-85014168074 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85014168074&doi=10.1109%2fSCORED.2016.7810033&partnerID=40&md5=1fbb836209bb33e6d61c5618b10a4004 https://irepository.uniten.edu.my/handle/123456789/23342 7810033 Institute of Electrical and Electronics Engineers Inc. Scopus
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
description Delay circuits; Flip flop circuits; Aliasing; Applied voltages; Average values; Circuit size; D flip flops; Memristor; Multiple response; Physically unclonable functions; Memristors
author2 57191483831
author_facet 57191483831
Loong J.T.H.
Nor Hashim N.A.
Hamid F.A.
format Conference Paper
author Loong J.T.H.
Nor Hashim N.A.
Hamid F.A.
spellingShingle Loong J.T.H.
Nor Hashim N.A.
Hamid F.A.
Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
author_sort Loong J.T.H.
title Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
title_short Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
title_full Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
title_fullStr Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
title_full_unstemmed Memristor-based arbiter Physically Unclonable Function (APUF) with multiple response bits
title_sort memristor-based arbiter physically unclonable function (apuf) with multiple response bits
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2023
_version_ 1806427695653847040