A feasible alternative to fdsoi and finfet: Optimization of w/la2o3/si planar pmos with 14 nm gate-length

Cost effectiveness; Fins (heat exchange); Gate dielectrics; Graphene; High-k dielectric; Low-k dielectric; Silica; Silicon on insulator technology; Silicon oxides; Silicon wafers; Threshold voltage; Voltage scaling; Feasible alternatives; Fin field-effect transistors; Fully depleted silicon-on-insul...

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Bibliographic Details
Main Authors: Mah S.K., Ker P.J., Ahmad I., Zainul Abidin N.F., Ali Gamel M.M.
Other Authors: 57191706660
Format: Article
Published: MDPI 2023
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Institution: Universiti Tenaga Nasional
Description
Summary:Cost effectiveness; Fins (heat exchange); Gate dielectrics; Graphene; High-k dielectric; Low-k dielectric; Silica; Silicon on insulator technology; Silicon oxides; Silicon wafers; Threshold voltage; Voltage scaling; Feasible alternatives; Fin field-effect transistors; Fully depleted silicon-on-insulator; Gate-length; MOS-FET; MOSFETs; Performance; PMOS; Taguchi; Technology nodes; FinFET