Optimization of reflow profile for copper pillar with SAC305 solder cap FCCSP

• Main Authors: Zainudin W.Z.Z.W., Yong T.C., Hui T.C., Kar Y.B., Hoong W.Y.
• Other Authors: 58072690400
• Format: Article
• Published: Springer 2024
• Subjects: Chip scale packages; Copper; Defects; Flip chip devices; Soldering; 'current; Copper pillars; Device development; Electrical devices; Liquidus; Miniaturisation; Optimisations; Ramp-rate; Soak time; Solder joints; Substrates
• Institution: Universiti Tenaga Nasional

The current trend of electrical devices development is progressing towards miniaturization, multi-function and high density, device integration and fine pitch in a smaller package size. This led to the invention of copper pillar bumps which acts as a connection between the dies to its corresponding...