Optical and Electrical Properties of Organic and Polymer Layers of Light Emitting Diode Structure

• Main Author: Lim, Mei Yee
• Format: Thesis
• Language: English; English
• Published: 2011
• Online Access: http://psasir.upm.edu.my/id/eprint/19612/1/FS_2011_23.pdf; http://psasir.upm.edu.my/id/eprint/19612/
• Institution: Universiti Putra Malaysia

The double and triplet layers of organic light emitting diode (OLEDs) and polymer light emitting diodes (PLEDs) were successfully fabricated by using thermal evaporation and dip coating method. The optical and electrical properties of OLEDs and PLEDs prepared from different thickness organic layers were studied. For the double layer heterostructure OLEDs, N, N`- bis (Inaphthyl) - N, N`-diphenyl-1, 1`-biphenyl-4, 4`-diamine (NPB) used as hole transport layer (HTL) while tris (8-hydroxyquinolinato) aluminum (Alq3) used as a electron transport layer (ETL), Indium Tin Oxide (ITO) as the anode aluminium (Al) as a cathode, respectively. The optimum condition for the double layer OLEDs devices prepared with ITO / NPB (55 nm) /Alq3 (84 nm) / Al (300 nm). In term of optical properties, this device has the lowest intensity of the light reflectance and the highest intensity of luminescence. This indicated that higher efficiency of the devices can be achieved with the lower current efficiency. This double layer heterostructure OLEDs has the lowest turn on voltage 5.1 V. The triplet layer OLEDs were fabricated in following order: ITO / NPB (55 nm) / CdS (130 nm) / Alq3 (84 nm) / Al, where Cadmium sulfide (CdS) used as hole blocking layer (HBL) in the devices. The luminescence intensity increase for the device due to the 130 nm of CdS has high enough to efficiently prevent the migration of the triplet excitons out of the luminescent layer. The effect of the CdS blocking layer can also be seen in I-V characteristic. The turn on voltage for the 130 nm CdS multilayer OLED devices was predicated 2.9 V. For the double layer heterostructure PLEDs, Poly (9-vinylcarbazole) (PVK) used as hole transport layer (HTL) while Alq3 used ETL, ITO as the anode and aluminium (Al) as a cathode. The optimum condition for the double layer PLEDs devices prepared with ITO / PVK (77 nm) / Alq3 (84 nm) / Al (300 nm). The photoluminescence for this device exhibit the highest intensity. The devices also obtained lowest turn on voltage, 5.9 V. The triplet layer for the PLED fabricated with ITO / PVK (77 nm) / CdS (115 nm) / Alq3 (84 nm) / Al (300 nm). In the PLED devices, a CdS layer was inserted between the 77 nm PVK and 84 nm Alq3 which absorb the ambient light to reduce the reflection of device. With the inserting 115 nm of CdS layer between the PVK and Alq3, a lower turn on voltage can be obtained at 5.4 eV.