A Performance Study of ATM Multicast Switch with Different Traffics

The demand of multicast service In ATM network such as video teleconferencing, broadband telephony and large file transfer makes the multicast switch very important. The multicast switch is needed to multicast an input cell to a number of selected output or broadcast it to all outputs. Since the...

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Bibliographic Details
Main Author: Hambali, Hamirul'aini
Format: Thesis
Language:English
English
Published: 1999
Subjects:
Online Access:http://psasir.upm.edu.my/id/eprint/9634/1/FSKTM_1999_8_IR.pdf
http://psasir.upm.edu.my/id/eprint/9634/
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Institution: Universiti Putra Malaysia
Language: English
English
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Summary:The demand of multicast service In ATM network such as video teleconferencing, broadband telephony and large file transfer makes the multicast switch very important. The multicast switch is needed to multicast an input cell to a number of selected output or broadcast it to all outputs. Since the cell loss and delay will decrease the performance of an ATM multicast switch, it should be designed so that the degradation is minimised. Hence, to improve the performance, which is characterised by cell loss probability and mean cell delay, this thesis proposes a new architecture of a multicast switch. In this thesis, the traffic is classified into three categories with different requirements: real-time, near real-time and non real-time. Since the real-time cell is very sensitive to delay, it is given the first priority to be served. Near real-time cell can tolerate a small delay while the non real-time cell is less sensitive to delay. Hence, the arriving cells of those traffic can be buffered to wait their tum to be transmitted. Two buffering schemes which respectively realise the buffer of near real-time and non real-time cell are implemented: First In First Out with Ordinary Blocking (FIFO-BL) and First In First Out (FIFO). To achieve a better performance, Largest Queue First Serve (LQFS) as a scheduling algorithm is implemented. The proposed architecture with the above buffering schemes and traffic classes is studied by developing appropriate simulation models. Subsequently, the effect of arrival rate, immediate rate, requested copy number, buffer size and RealTC rate on the switch performance are studied quantitatively and qualitatively. It is concluded that the proposed architecture can support the future different multimedia traffic types, where cell loss probability and delay requirement will be the main factors.