Design of CMOS schmitt triggers circuit for low application device

• Main Authors: Muhammad Mustafa, Ahmad Nizamuddin, Hasan, Zulhasnizam, Ayob, Mohd Erdi, Arith, Faiz, Drahim, Noor Shazwani Najwa
• Format: Article
• Language: English
• Published: Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 2018
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utem.edu.my/id/eprint/23229/1/Design%20of%20CMOS%20Schmitt%20Triggers%20Circuit%20for%20Low.pdf; http://eprints.utem.edu.my/id/eprint/23229/; https://jtec.utem.edu.my/jtec/article/view/3738/2662
• Institution: Universiti Teknikal Malaysia Melaka

Schmitt triggers are electronic comparators circuit which are generally used to help improve the circuit immunity towards noise and disturbance. They had become significant components of various emerging applications. However, they are still facing a problem in term the noise problem in the output signal of the Schmitt Trigger which is do not able to operate at low voltage. In this research a Schmitt Trigger is design to function at low voltage. This design is realized based on 0.18μm CMOS technology by using Cadence simulation software. A few voltage values have been tested in this circuit and the optimized voltage for this project is 0.8 V to 1.5 V. Therefore this circuit design is applicable for various low voltage analogue or digital applications.