Novel High Performance Ambient RFF Energy Harvesting System-On-Chip For Emerging Wireless Devices And Mobile Applications

• Main Authors: Wong, Yan Chiew, Abdul Hamid, Norihan, Salehuddin, Fauziyah, Ahmad Radzi, Syafeeza, Kok, Swee Leong
• Format: Technical Report
• Language: English
• Published: UTeM 2019
• Online Access: http://eprints.utem.edu.my/id/eprint/25465/1/Novel%20High%20Performance%20Ambient%20Rff%20Energy%20Harvesting%20System-On-Chip%20For%20Emerging%20Wireless%20Devices%20And%20Mobile%20Applications.pdf; http://eprints.utem.edu.my/id/eprint/25465/; https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=118116
• Institution: Universiti Teknikal Malaysia Melaka

Radio Frequency (RF) energy harvesting refers to the concept of harvesting and recycling the RF energy in the surroundings that is widely broadcasted by many wireless systems. It is a promising technique that can be used to replace batteries or prolong their lifespan. Nowadays, mobility and low power consumption has led to small electronic circuitry, thus RF Energy Harvesting System (RFEHS) is desired to be miniature so that it can be integrated with other small systems as well. Furthermore, there are emerging demands on building RFEHS on a single silicon chip known as System on Chip (SoC) using Complementary Metal-Oxide-Semiconductor (CMOS) technology. Therefore, this study investigates the design of RFEHS using CMOS process technology. The design involves three key components; the rectifier, the impedance matching and the antenna. The rectifier is based on bulk-to-source BTMOS differential-drive based rectifier to produce a high efficiency RF energy harvesting system. Low-pass upward matching network is applied at the rectifier input to increase the sensitivity and output voltage. Dual-oxide-thickness transistors are used in the rectifier circuit to maintain the power efficiency at each of the rectifier’s stage. The system is designed using 0.18μm Silterra RF in deep n-well process technology and achieves 4.07V output at -16dBm sensitivity without the need of complex auxiliary control circuit and DC-DC charge-pump circuit. Meanwhile, the on-chip design is based on 0.13 μm and 0.18 μm CMOS process technologies and two antenna topologies have been evaluated which are the spiral-slot design and spiral design. Studies involving the thicknesses of metals and substrate in CMOS technology have been performed and the results show that thicker metal and substrate contribute to an improved gain and bandwidth. This work has also proposed a technique to transfer antenna design between different CMOS process technologies without having major effect on its gain and bandwidth through manipulation on the ground planes. The work has been fabricated considering the required standard thickness of the CMOS technology defined by the selected foundry. Overall, miniature antenna design has been presented for on-chip topologies for RFEHS.