Implementation of nearest level control method for single-phase transistor-clamped H-bridge multilevel inverter

• Main Author: Saleh, Wail Ali Ali
• Format: Thesis
• Language: English; English
• Published: 2021
• Subjects: T Technology (General); TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utem.edu.my/id/eprint/25991/1/Implementation%20of%20nearest%20level%20control%20method%20for%20single-phase%20transistor-clamped%20H-bridge%20multilevel%20inverter.pdf; http://eprints.utem.edu.my/id/eprint/25991/2/Implementation%20of%20nearest%20level%20control%20method%20for%20single-phase%20transistor-clamped%20H-bridge%20multilevel%20inverter.pdf; http://eprints.utem.edu.my/id/eprint/25991/; https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=121219
• Institution: Universiti Teknikal Malaysia Melaka

Multilevel Inverters (MLIs) are gaining particular interest among researchers and in the industrial sector owing to their widespread applications and numerous features. Transistor-Clamped H-Bridge (TCHB) MLI has received increasing research attention due to its advantage in producing high-quality output using a reduced number of switches and DC voltage sources compared with other conventional MLI topologies. With regard to the modulation technique, High Switching Frequency (HSF) modulations suffer from high switching losses, making them unsuitable for high-power applications. For such applications, Low Switching Frequency (LSF) modulations, such as Nearest Level Control (NLC), are more efficient as they operate at low frequency and thus reduce switching losses significantly. NLC is a simple method in its concept and implementation. The main aim of this study is to implement the proposed NLC method to a single-phase TCHB MLI with symmetrical and asymmetrical DC voltage sources and to evaluate its Total Harmonic Distortion (THD) minimization. Two topologies of the TCHB MLI are investigated in this study, which are nine-level symmetrical and thirteen-level asymmetrical TCHB inverters. Adopting an asymmetry for the DC voltage sources of the MLI results in a higher number of output levels. The selected voltage ratio of the DC sources in the asymmetrical topology is 1: 2. The adopted topologies and the proposed control method are modeled through simulations in Matlab/Simulink. The simulation results are verified through experimental tests using an Altera Field-Programmable Gate Array (FPGA). The results show that the topologies and the proposed control method are efficient in achieving high-quality output with an improved THD. The minimum voltage THDs obtained from the experiments are below 8.1 % for the nine-level inverter and below 5.3% for the thirteen-level inverter for different types of load, which almost comply with IEEE Standard 519-2014. The simulation results are in close agreement with the experimental ones. It is concluded that the NLC performs more efficiently for inverters with a higher number of levels and produces better THD results compared with other LSF modulations.