Impact of Different Dose and Angle in HALO Structure for 45nm NMOS Device

In this paper, we investigates the different dose and tilt HALO implant step in order to characterize the 45nm NMOS device. Besides HALO, the other two process parameters are oxide growth temperature and source/drain (S/D) implant dose. The settings of process parameters were determined by using...

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Bibliographic Details
Main Author: Fauziyah, Salehuddin
Format: Article
Language:English
Published: Trans Tech Publications 2012
Subjects:
Online Access:http://eprints.utem.edu.my/id/eprint/4197/1/%28J8%29_AMR.383-390.6827.pdf
http://eprints.utem.edu.my/id/eprint/4197/
http://www.scientific.net/AMR.383-390.6827
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Institution: Universiti Teknikal Malaysia Melaka
Language: English
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Summary:In this paper, we investigates the different dose and tilt HALO implant step in order to characterize the 45nm NMOS device. Besides HALO, the other two process parameters are oxide growth temperature and source/drain (S/D) implant dose. The settings of process parameters were determined by using Taguchi experimental design method. This work was done using TCAD simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. These two simulators were combined with Taguchi method to aid in design and optimizer the process parameters. Threshold voltage (VTH) results were used as the evaluation variable. The results were then subjected to the Taguchi method to determine the optimal process parameters and to produce predicted values. In this research, oxide growth temperature was the major factor affecting the threshold voltage (69%), whereas halo implant tilt was the second ranking factor (20%). The percent effect on Signal-to-Noice (S/N) ratio of halo implant dose and S/D implant dose are 6% and 5% respectively. As conclusions, oxide growth temperature and halo implant tilt were identified as the process parameters that have strongest effect on the response characteristics. While S/D implant dose was identified as an adjustment factor to get threshold voltage for NMOS device closer to the nominal value (0.150V) at tox= 1.1nm.