Simulation, fabrication and characterization of NMOS transistor
This thesis explains the recipe module development for the first Long Channel NMOS transistor device fabrication process at cleanroom laboratory of KUiTTHO. A recipe for the NMOS transistor fabrication process has been successfully produced. Threshold Voltage and Leakage Current, with different...
Saved in:
| Main Author: | |
|---|---|
| Format: | Thesis |
| Language: | English English English |
| Published: |
2006
|
| Subjects: | |
| Online Access: | http://eprints.uthm.edu.my/7107/1/24p%20DAMHUJI%20%20RIFAI.pdf http://eprints.uthm.edu.my/7107/2/DAMHUJI%20%20RIFAI%20COPYRIGHT%20DECLARATION.pdf http://eprints.uthm.edu.my/7107/3/DAMHUJI%20%20RIFAI%20WATERMARK.pdf http://eprints.uthm.edu.my/7107/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Institution: | Universiti Tun Hussein Onn Malaysia |
| Language: | English English English |
| Summary: | This thesis explains the recipe module development for the first Long
Channel NMOS transistor device fabrication process at cleanroom laboratory of
KUiTTHO. A recipe for the NMOS transistor fabrication process has been
successfully produced. Threshold Voltage and Leakage Current, with different
channel length and oxide gate for the Long Channel NMOS transistor too has been
investigated. The data from the experiment conducted have shown that the threshold
voltage is more influenced by the thickness of the oxide gate as compared with the
channel length. The threshold voltage increased in linear form with the increase of
the oxide gate thickness; and there is almost no change for different channel length.
Leakage Current reduces exponentially with the increase of the oxide gate thickness
and the channel length. |
|---|