Scalable multicore design for test interface design

• Main Author: Chong, Shi Hou
• Format: Thesis
• Language: English
• Published: 2007
• Subjects: QA75 Electronic computers. Computer science; TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/11577/1/ChongShiHouMFKE2008.pdf; http://eprints.utm.my/id/eprint/11577/
• Institution: Universiti Teknologi Malaysia

With industries moving towards converged core design, and multicore processors products, DFx design and testing strategy need to be able to catch up with the pace of product development cycle, increase in test content and test time, as well as converged core design reuse in proliferation of products. As such, core-level test content must be reusable, multicore testing have to be done concurrently, while allow the choice of core isolation, as well as DFx multicore interface that are scalable to facilitate proliferation of products. The main objectives of this project are to investigate on major problems of multicore Design For Testability interface design, to analyze and understand pros and cons of multiple industrial multicore Design For Testability interface designs, to propose and to implement a novel design that can tackle three major problems in term of multicore Design For Testability interface design scalability, concurrent testability as well as trace reusability.