FPGA Implementation of RSA Public-Key Cryptographic Coprocessor
The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modul...
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my.utm.19892010-06-01T03:00:07Z http://eprints.utm.my/id/eprint/1989/ FPGA Implementation of RSA Public-Key Cryptographic Coprocessor Hani, Mohamed Khalil Shaikh-Husin, Nasir Tan, Siang Lin TK Electrical engineering. Electronics Nuclear engineering The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modular multiplication based on the algorithm of Montgomery (1985) is proposed. The design is targeted for implementation in reconfigurable logic, which can yield custom-hardware performance yet maintains all the flexibility of software-based systems. Reconfigurable computing allows the designer to respond, in the prototyping stage, to flaws discovered in implementation or to changes in standards or data formats. We report the issues involved in the preliminary design of the prototype to be fabricated in Altera FLEX10KE series FPGA mounted on a PCI card 2000-09-24 Article PeerReviewed application/pdf en http://eprints.utm.my/id/eprint/1989/1/ShaikhHusin2000_FGPAImplementationOf_RSAPublic.pdf Hani, Mohamed Khalil and Shaikh-Husin, Nasir and Tan, Siang Lin (2000) FPGA Implementation of RSA Public-Key Cryptographic Coprocessor. TENCON 2000. Proceedings , 3 . pp. 6-11. |
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TK Electrical engineering. Electronics Nuclear engineering Hani, Mohamed Khalil Shaikh-Husin, Nasir Tan, Siang Lin FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
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The hardware implementation of the RSA algorithm for public-key cryptography is presented. The algorithm is dependent on the computation of modular exponentials. Critical to this computation is a fast implementation of modular multiplications. A high-performance systolic array architecture for modular multiplication based on the algorithm of Montgomery (1985) is proposed. The design is targeted for implementation in reconfigurable logic, which can yield custom-hardware performance yet maintains all the flexibility of software-based systems. Reconfigurable computing allows the designer to respond, in the prototyping stage, to flaws discovered in implementation or to changes in standards or data formats. We report the issues involved in the preliminary design of the prototype to be fabricated in Altera FLEX10KE series FPGA mounted on a PCI card |
format |
Article |
author |
Hani, Mohamed Khalil Shaikh-Husin, Nasir Tan, Siang Lin |
author_facet |
Hani, Mohamed Khalil Shaikh-Husin, Nasir Tan, Siang Lin |
author_sort |
Hani, Mohamed Khalil |
title |
FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
title_short |
FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
title_full |
FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
title_fullStr |
FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
title_full_unstemmed |
FPGA Implementation of RSA Public-Key Cryptographic Coprocessor |
title_sort |
fpga implementation of rsa public-key cryptographic coprocessor |
publishDate |
2000 |
url |
http://eprints.utm.my/id/eprint/1989/1/ShaikhHusin2000_FGPAImplementationOf_RSAPublic.pdf http://eprints.utm.my/id/eprint/1989/ |
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