Face detection hardware accelerator using C-based high-level synthesis

Research has shown that Field Programmable Gate Array (FPGA) based implementation of image processing system results in high computational speed and energy efficiency. However, FPGA design has relatively long development time compared to alternative implementation platforms, such as those based on C...

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Bibliographic Details
Main Author: Yeap, Han Chien
Format: Thesis
Language:English
Published: 2018
Subjects:
Online Access:http://eprints.utm.my/id/eprint/79563/1/Yeap%2C%20Han%20Chien.pdf
http://eprints.utm.my/id/eprint/79563/
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Institution: Universiti Teknologi Malaysia
Language: English
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