A review of the top of the barrier nanotransistor models for semiconductor nanomaterials
The modelling and simulation of low-dimensional nanoelectronic devices is important, because the semiconductor industry has scaled transistors down to the sub-10nm regime. The top of the barrier (ToB) transistor model has been developed and used to model transistors that are composed of various semi...
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Main Authors: | , , , , , , |
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Format: | Article |
Published: |
Elsevier Ltd.
2020
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Subjects: | |
Online Access: | http://eprints.utm.my/id/eprint/87902/ http://www.dx.doi.org/10.1016/j.spmi.2020.106429 |
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Institution: | Universiti Teknologi Malaysia |