Wirelength estimation in VLSI cell placement using machine learning techniques

In recent years, artificial intelligence (AI) plays an important role in Very Large-Scale Integration (VLSI) circuit design for wirelength prediction of cell placement. As compared to conventional wirelength estimation techniques such as Half-Perimeter Wirelength (HPWL) and Rectilinear Steiner Minim...

Full description

Saved in:
Bibliographic Details
Main Author: Cheong, Zheng Quan
Format: Thesis
Language:English
Published: 2022
Subjects:
Online Access:http://eprints.utm.my/id/eprint/99381/1/CheongZhengQuanMSKE2022.pdf
http://eprints.utm.my/id/eprint/99381/
http://dms.library.utm.my:8080/vital/access/manager/Repository/vital:149990
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Universiti Teknologi Malaysia
Language: English