Hardware Software Co-Design of a Multimedia SOC Platform
System on Chip (SoC) platforms have become the de facto enabling technology for mobile multimedia personal communication and entertainment embedded systems. Among various architecture choices, application-specific instruction-set processors (ASIP) that incorporate sub-word parallelism provide a low-...
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oai:112.137.131.14:VNU_123-309602020-06-25T07:47:48Z Hardware Software Co-Design of a Multimedia SOC Platform Chen, S.-J. Lin, G.-H. Hsiung, P.-A. Hu, Y.-H. Engineering 004.2 System on Chip (SoC) platforms have become the de facto enabling technology for mobile multimedia personal communication and entertainment embedded systems. Among various architecture choices, application-specific instruction-set processors (ASIP) that incorporate sub-word parallelism provide a low-cost high-performance solution particularly suitable for manipulating short word-length multimedia data streams. Hardware Software Co-Design of a Multimedia SOC Platform is one of the first of its kinds to provide a comprehensive overview of the design and implementation of the hardware and software of an SoC platform for multimedia applications. Topics covered in this book range from system level design methodology, multimedia algorithm implementation, a sub-word parallel, single-instruction-multiple data (SIMD) processor design, and its virtual platform implementation, to the development of an SIMD parallel compiler as well as a real-time operating system (RTOS). 2017-04-19T02:49:58Z 2017-04-19T02:49:58Z 2009 Book 9781402096235 http://repository.vnu.edu.vn/handle/VNU_123/30960 en 152 p. application/pdf Springer |
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Engineering 004.2 Chen, S.-J. Lin, G.-H. Hsiung, P.-A. Hu, Y.-H. Hardware Software Co-Design of a Multimedia SOC Platform |
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System on Chip (SoC) platforms have become the de facto enabling technology for mobile multimedia personal communication and entertainment embedded systems. Among various architecture choices, application-specific instruction-set processors (ASIP) that incorporate sub-word parallelism provide a low-cost high-performance solution particularly suitable for manipulating short word-length multimedia data streams.
Hardware Software Co-Design of a Multimedia SOC Platform is one of the first of its kinds to provide a comprehensive overview of the design and implementation of the hardware and software of an SoC platform for multimedia applications. Topics covered in this book range from system level design methodology, multimedia algorithm implementation, a sub-word parallel, single-instruction-multiple data (SIMD) processor design, and its virtual platform implementation, to the development of an SIMD parallel compiler as well as a real-time operating system (RTOS). |
format |
Book |
author |
Chen, S.-J. Lin, G.-H. Hsiung, P.-A. Hu, Y.-H. |
author_facet |
Chen, S.-J. Lin, G.-H. Hsiung, P.-A. Hu, Y.-H. |
author_sort |
Chen, S.-J. |
title |
Hardware Software Co-Design of a Multimedia SOC Platform |
title_short |
Hardware Software Co-Design of a Multimedia SOC Platform |
title_full |
Hardware Software Co-Design of a Multimedia SOC Platform |
title_fullStr |
Hardware Software Co-Design of a Multimedia SOC Platform |
title_full_unstemmed |
Hardware Software Co-Design of a Multimedia SOC Platform |
title_sort |
hardware software co-design of a multimedia soc platform |
publisher |
Springer |
publishDate |
2017 |
url |
http://repository.vnu.edu.vn/handle/VNU_123/30960 |
_version_ |
1680964805405442048 |