Inter-integrated circuit (I²C) design of Zilog's z8 Encore! XP®

• Main Authors: Carino, Franz Marco R., Malubay, Mary Joyce V., Rama, Noel Jazz P., Ramirez, Daizy Zari D.
• Format: text
• Language: English
• Published: Animo Repository 2011
• Subjects: Zilog Z-80 (Microprocessor); Digital integrated circuits > Design and construction; Communication; Electrical and Electronics; Engineering
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/10688
• Institution: De La Salle University

This paper reviews the theoretical operation and describes the design of a Inter-Integral Circuit (I2C) using 0.25um CMOS technology. 12C is a communication tool used to communicate between peripheral devices. It is composed OF 2 bidirectional buses/lines namely the SCL and SDA lines. The different control signal passes through these lines to establish an operation between the master and the slave. The 12C configuration could be a MASTER-SLAVE mode, MASTER mode or SLAVE MODE. The I2C module design aims to mimic the behavior of I2C module of Zilog's Z8 Encore! XP® F64XX Series Development Kit. This design is limited only to 8-bit data transfer application and tested only using a 4k EEPROM (AT24C04) as a slave. This design only dealt with the MASTER mode configuration of the I2C.