An FPGA based 16-bit RISC microprocessor core architecture

• Main Authors: Cordero, Sherwin G., Gandia, Leianne J., Lo, Randolph T., Mendoza, Raymond Bonn C., Tan, Jackson S.
• Format: text
• Language: English
• Published: Animo Repository 2006
• Subjects: Field programmable gate arrays > Computer-aided design; Programmable array logic; Programmable logic devices; Gate array circuits; Microcomputers > Design and construction; Computer Engineering
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/14286
• Institution: De La Salle University

Learning fundamentals in designing and implementing a microprocessor is a very critical part on developing such high end systems. This will serve as a strong foundation in designing high-end microprocessors. This thesis which is an FPGA based microprocessor core is a learning tool for the students and future designers. Traditionally, student designers make microprocessors using microcontrollers or the combination of various chips digital converters are not used in making a microprocessor. Also, implementation using integrated circuits through rapid prototyping can limit the design and have trade offs just to have a functioning hardware implementation. Because of this disadvantage, FPGA will be one of the best solutions. The reconfigurability factor of the FPGA is a very important feature especially in upgrading the microprocessor. Traditional way of implementing microprocessors with discrete components is very tedious than implementing it in FPGA. With an FPGA implementation, students can focus more on the designing of the microprocessor with the performance in mind rather than being limited by the trade offs presented when implemented using discrete components. This research is an FPGA implementation of a CPU core based on the DLX architecture developed by Hennessy and Patterson. A Virtex-II V2MB1000 FPGA development board was used in the implementation of the microprocessor core which employed pipelining techniques to increase the performance.