Narrowband PLC tested for demonstrating PLC characterization

• Main Authors: Del Castillo, Nicholas Thomas Ray P., San Juan, Kayle C., Tan, Maxilyn C.
• Format: text
• Language: English
• Published: Animo Repository 2016
• Subjects: Electric power systems > Communication systems; Field programmable gate arrays; Electric lines; Power electronics; Electrical and Electronics; Power and Energy
• Online Access: https://animorepository.dlsu.edu.ph/etd_bachelors/7174
• Institution: De La Salle University

The development of powerline channel emulator requires extensive knowledge on techniques in both hardware and software, together with advanced mathematical familiarity, digital signal processing techniques, and of course, a deep understanding on the theory and the concepts of powerline communications. This study presents a method where the narrowband channel emulator can be implemented with the use of a Field-programmable Gate Array (FPGA). The testbed is beneficial to those who wish to study powerline communications and the effect of different types of noise present in a powerline channel in a controlled environment. Further, the study demonstrates a basic estimation of the powerline channel with the use of the Zimmermann model. The channel's capacity clearly exhibits the enormous potential for higher bandwidth communication purposes.