PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores
This project presents an 8-bit microcontroller development platform using IP cores implemented on FPGA. Three (3) Xilinx (R) PicoBlaze (TM) IP microprocessor cores were implemented in the Spartan-3 Development Board: one (1) loader core, and two (2) independent runner cores. The loader core us used...
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oai:animorepository.dlsu.edu.ph:faculty_research-134242024-01-15T02:32:18Z PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores Mallari, Noriel C. This project presents an 8-bit microcontroller development platform using IP cores implemented on FPGA. Three (3) Xilinx (R) PicoBlaze (TM) IP microprocessor cores were implemented in the Spartan-3 Development Board: one (1) loader core, and two (2) independent runner cores. The loader core us used to program the runner cores. Runner cores are programmed by the loader core via connections to the runner cores' instruction memory. Programming is done via RS-232 serial communications with a host PC using a custom-designed in-system programming protocol. An Integrated Development Environment (IDE) was developed to integrate editing of assembly PSM files, assembling of PSM assembly files, and downloading of generated HEX files to any of runner core with the aid of a user-friendly Graphical User Interface (GUI). 2024-05-20T09:55:37Z text https://animorepository.dlsu.edu.ph/faculty_research/12189 Faculty Research Work Animo Repository Field programmable gate arrays Microcontrollers Other Engineering |
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Field programmable gate arrays Microcontrollers Other Engineering Mallari, Noriel C. PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
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This project presents an 8-bit microcontroller development platform using IP cores implemented on FPGA. Three (3) Xilinx (R) PicoBlaze (TM) IP microprocessor cores were implemented in the Spartan-3 Development Board: one (1) loader core, and two (2) independent runner cores. The loader core us used to program the runner cores. Runner cores are programmed by the loader core via connections to the runner cores' instruction memory. Programming is done via RS-232 serial communications with a host PC using a custom-designed in-system programming protocol. An Integrated Development Environment (IDE) was developed to integrate editing of assembly PSM files, assembling of PSM assembly files, and downloading of generated HEX files to any of runner core with the aid of a user-friendly Graphical User Interface (GUI). |
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Mallari, Noriel C. |
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Mallari, Noriel C. |
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Mallari, Noriel C. |
title |
PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
title_short |
PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
title_full |
PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
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PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
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PicoDuo: 8-bit microcontroller development platform implemented on FPGA using IP cores |
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picoduo: 8-bit microcontroller development platform implemented on fpga using ip cores |
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Animo Repository |
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2024 |
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https://animorepository.dlsu.edu.ph/faculty_research/12189 |
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1800918945688977408 |