Analog realization of a low-voltage two-order selectable fractional-order differentiator in a 0.35um CMOS technology

The analog realization of a selectable fractional-order differentiator (FOD) in a microelectronics scale is mainly the focus of this study. From this design, the order of differentiation can be selected between FOD(0.25) and FOD(0.50). While the aim is to make the hardware implementation as compact...

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Main Authors: Abulencia, Geoffrey L., Abad, Alexander C.
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出版: Animo Repository 2016
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在線閱讀:https://animorepository.dlsu.edu.ph/faculty_research/2973
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機構: De La Salle University