RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator
The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter impl...
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oai:animorepository.dlsu.edu.ph:faculty_research-46352022-08-30T02:31:29Z RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator Gara, Glenn Paul P. Pacot, Mark Phil B. Uy, Roger Luis The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter implements the most recent developments of MIPS64 instruction sets. The method applied to solve the LCS in this study was the first known solution invented by Wagner and Fischer. The authors programmed the LCS on a RISC architecture and evaluated the results of the test cases by observing the number of clock cycles performed through the simulators. Results show that the MIPSers executed the least number of clock cycles compared to the EduMIPS64 simulator. © 2018 IEEE. 2019-02-22T08:00:00Z text text/html https://animorepository.dlsu.edu.ph/faculty_research/3633 info:doi/10.1109/TENCON.2018.8650369 https://animorepository.dlsu.edu.ph/context/faculty_research/article/4635/type/native/viewcontent/TENCON.2018.8650369 Faculty Research Work Animo Repository Reduced instruction set computers Computer Sciences |
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Reduced instruction set computers Computer Sciences Gara, Glenn Paul P. Pacot, Mark Phil B. Uy, Roger Luis RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
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The longest common subsequence (LCS) is an essential technique in the sequence alignment. By deleting zero or more symbols, it determines one of the longest subsequences in a sequence. This paper described a simulation of the algorithm using the EduMIPS64 and MIPSers simulators where the latter implements the most recent developments of MIPS64 instruction sets. The method applied to solve the LCS in this study was the first known solution invented by Wagner and Fischer. The authors programmed the LCS on a RISC architecture and evaluated the results of the test cases by observing the number of clock cycles performed through the simulators. Results show that the MIPSers executed the least number of clock cycles compared to the EduMIPS64 simulator. © 2018 IEEE. |
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text |
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Gara, Glenn Paul P. Pacot, Mark Phil B. Uy, Roger Luis |
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Gara, Glenn Paul P. Pacot, Mark Phil B. Uy, Roger Luis |
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Gara, Glenn Paul P. |
title |
RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
title_short |
RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
title_full |
RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
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RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
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RISC-based simulation of longest common subsequence algorithm in MIPS64 simulator |
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risc-based simulation of longest common subsequence algorithm in mips64 simulator |
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Animo Repository |
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2019 |
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https://animorepository.dlsu.edu.ph/faculty_research/3633 https://animorepository.dlsu.edu.ph/context/faculty_research/article/4635/type/native/viewcontent/TENCON.2018.8650369 |
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