A Low Power High CMRR CMOS Instrumentation Amplifier Based on Differential Voltage – Current Conveyor for Beta-Dispersion Range Bio-Impedance Applications

In this paper, a low power and high CMRR Instrumentation Amplifier is presented. It has been designed for use in Bio-Impedance (BI) applications that operate within the beta dispersion frequency range. An IA with a high CMRR and input impedance allows the extraction of the low amplitude BI signal wh...

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Bibliographic Details
Main Authors: Silverio, Angelito A, Reyes, Rosula SJ, Chung, Wen-Yaw
Format: text
Published: Archīum Ateneo 2012
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Online Access:https://archium.ateneo.edu/ecce-faculty-pubs/57
http://www.wseas.us/e-library/conferences/2012/Rovaniemi/IMMURO/IMMURO-04.pdf
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Institution: Ateneo De Manila University
Description
Summary:In this paper, a low power and high CMRR Instrumentation Amplifier is presented. It has been designed for use in Bio-Impedance (BI) applications that operate within the beta dispersion frequency range. An IA with a high CMRR and input impedance allows the extraction of the low amplitude BI signal while reducing the error signals and noise associated with the tissue and instrument interface. These result from the parasitic impedances of the electrodes and their corresponding half-cell potentials, the finite output impedance of the current source, and the common-mode signals coupled to the current source. The IA has a current-mode structure utilizing a Differential Voltage Current Conveyor (DVCC) to provide most of the CMRR. This structure has an improved performance with regard to CMRR and operating frequency as compared to voltagemode topologies. The DVCC is coupled to a Folded-Cascode Operational Transconductance Amplifier (FCOTA) which provides the voltage gain. The FC-OTA is coupled to an analog buffer that serves as the output drive stage. The IA has been designed using TSMC 0.35µm CMOS 2P4M Technology. The pre-layout and post-layout performance of the IA has been verified using HSPICE. The layout was done in LAKER. The IA has achieved, in post-layout simulation, a CMRR of 98dB, an input impedance of 4.85MΩ (differential mode) and 1.4MΩ (common-mode) at 1MHz, a DC voltage gain of 67dB, and a Unity Gain Bandwidth (UGBW) of 7.2MHz. The IA’s power dissipation is only 1.27mW in open-loop configuration. Transient simulations using an interface model at 1MHz of frequency showed a Total Harmonic Distortion (THD) of only 1.9%, a Signal to Noise Ratio (SNR) of 49.5dB and a Spurious Free Dynamic Range (SFDR) of 33.dB. The IA has a layout area of 250µm x 250µm.