FPGA-based telecommunications trainer
The field programmable gate array (FPGA)-based telecommunications trainer serves as an educational tool to effectively teach the fundamental principles of telecommunication systems. It is capable of performing both digital and analog modulation, which includes amplitude modulation, frequency modulat...
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Archīum Ateneo
2008
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ph-ateneo-arc.ecce-faculty-pubs-10692020-08-13T05:52:07Z FPGA-based telecommunications trainer Reyes, Rosula SJ Oppus, Carlos M Monje, Jose Claro N Patron, Noel S Guerrero, Raphael A Fajardo, Jovilyn Therese B The field programmable gate array (FPGA)-based telecommunications trainer serves as an educational tool to effectively teach the fundamental principles of telecommunication systems. It is capable of performing both digital and analog modulation, which includes amplitude modulation, frequency modulation, phase modulation, pulse code modulation, pulse width modulation, pulse position modulation, pulse amplitude modulation, delta modulation, amplitude shift keying, frequency shift keying, and phase shift keying. It is also capable of performing different encoding techniques, which includes non-return-to-zero line code, non-return-to-zero mark line code, non-return to zero inversion line code, Unipolar return-to-zero line code, bipolar return-to-zero line code, alternate mark inversion line code, and Manchester line code. All the mentioned modulation and encoding techniques have its demodulation and decoding counterparts respectively. Aside from modulation and encoding, this trainer is also capable of time division multiplexing. Because it was designed to be low-cost, this trainer does not need additional equipments like oscilloscopes and function generators. It is capable of internally generating a low-frequency input signal and using the VGA port to display its output. Moreover, since it is FPGA-based, this trainer can be reconfigured to perform other trainers (e.g. digital signal processing) making it open to a lot of possibilities. 2008-07-01T07:00:00Z text https://archium.ateneo.edu/ecce-faculty-pubs/70 https://dl.acm.org/doi/10.5555/1580134.1580190 Electronics, Computer, and Communications Engineering Faculty Publications Archīum Ateneo Electrical and Computer Engineering Systems and Communications |
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Electrical and Computer Engineering Systems and Communications Reyes, Rosula SJ Oppus, Carlos M Monje, Jose Claro N Patron, Noel S Guerrero, Raphael A Fajardo, Jovilyn Therese B FPGA-based telecommunications trainer |
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The field programmable gate array (FPGA)-based telecommunications trainer serves as an educational tool to effectively teach the fundamental principles of telecommunication systems. It is capable of performing both digital and analog modulation, which includes amplitude modulation, frequency modulation, phase modulation, pulse code modulation, pulse width modulation, pulse position modulation, pulse amplitude modulation, delta modulation, amplitude shift keying, frequency shift keying, and phase shift keying. It is also capable of performing different encoding techniques, which includes non-return-to-zero line code, non-return-to-zero mark line code, non-return to zero inversion line code, Unipolar return-to-zero line code, bipolar return-to-zero line code, alternate mark inversion line code, and Manchester line code. All the mentioned modulation and encoding techniques have its demodulation and decoding counterparts respectively. Aside from modulation and encoding, this trainer is also capable of time division multiplexing. Because it was designed to be low-cost, this trainer does not need additional equipments like oscilloscopes and function generators. It is capable of internally generating a low-frequency input signal and using the VGA port to display its output. Moreover, since it is FPGA-based, this trainer can be reconfigured to perform other trainers (e.g. digital signal processing) making it open to a lot of possibilities. |
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text |
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Reyes, Rosula SJ Oppus, Carlos M Monje, Jose Claro N Patron, Noel S Guerrero, Raphael A Fajardo, Jovilyn Therese B |
author_facet |
Reyes, Rosula SJ Oppus, Carlos M Monje, Jose Claro N Patron, Noel S Guerrero, Raphael A Fajardo, Jovilyn Therese B |
author_sort |
Reyes, Rosula SJ |
title |
FPGA-based telecommunications trainer |
title_short |
FPGA-based telecommunications trainer |
title_full |
FPGA-based telecommunications trainer |
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FPGA-based telecommunications trainer |
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FPGA-based telecommunications trainer |
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fpga-based telecommunications trainer |
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Archīum Ateneo |
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2008 |
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https://archium.ateneo.edu/ecce-faculty-pubs/70 https://dl.acm.org/doi/10.5555/1580134.1580190 |
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