Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols
Reconfigurable devices, such as the field programmable gate arrays (FPGA), have provided electrical, electronics and computer engineers with a versatile and costeffective platform for designing circuits, developing devices and implementing electronic, communications, computer and other related syste...
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Archīum Ateneo
2011
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ph-ateneo-arc.ecce-faculty-pubs-10732020-09-11T07:15:46Z Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols Reyes, Rosula SJ Oppus, Carlos Monje, Jose Claro N Patron, Noel S Gonzales, Raphael A Idaño, Oscar Retirado, Mark Glenn F Reconfigurable devices, such as the field programmable gate arrays (FPGA), have provided electrical, electronics and computer engineers with a versatile and costeffective platform for designing circuits, developing devices and implementing electronic, communications, computer and other related systems. Presented in this paper is the use of FPGA in the development of a motherboard to introduce the concepts of data and network communications protocol through different interfaces. Some of the protocols implemented are VGA, PS/2, serial communications and parallel communications. Since the motherboard is FPGA-based, it can be reconfigured to perform other protocols making it open to a lot of possibilities. 2011-01-01T08:00:00Z text https://archium.ateneo.edu/ecce-faculty-pubs/74 https://www.naun.org/main/NAUN/circuitssystemssignal/20-603.pdf Electronics, Computer, and Communications Engineering Faculty Publications Archīum Ateneo communications data field programmable gate array motherboard network protocols trainers Computer Engineering Electrical and Computer Engineering |
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communications data field programmable gate array motherboard network protocols trainers Computer Engineering Electrical and Computer Engineering Reyes, Rosula SJ Oppus, Carlos Monje, Jose Claro N Patron, Noel S Gonzales, Raphael A Idaño, Oscar Retirado, Mark Glenn F Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
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Reconfigurable devices, such as the field programmable gate arrays (FPGA), have provided electrical, electronics and computer engineers with a versatile and costeffective platform for designing circuits, developing devices and implementing electronic, communications, computer and other related systems. Presented in this paper is the use of FPGA in the development of a motherboard to introduce the concepts of data and network communications protocol through different interfaces. Some of the protocols implemented are VGA, PS/2, serial communications and parallel communications. Since the motherboard is FPGA-based, it can be reconfigured to perform other protocols making it open to a lot of possibilities. |
format |
text |
author |
Reyes, Rosula SJ Oppus, Carlos Monje, Jose Claro N Patron, Noel S Gonzales, Raphael A Idaño, Oscar Retirado, Mark Glenn F |
author_facet |
Reyes, Rosula SJ Oppus, Carlos Monje, Jose Claro N Patron, Noel S Gonzales, Raphael A Idaño, Oscar Retirado, Mark Glenn F |
author_sort |
Reyes, Rosula SJ |
title |
Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
title_short |
Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
title_full |
Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
title_fullStr |
Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
title_full_unstemmed |
Field Programmable Gate Array Implementation of a Motherboard for Data Communications and Networking Protocols |
title_sort |
field programmable gate array implementation of a motherboard for data communications and networking protocols |
publisher |
Archīum Ateneo |
publishDate |
2011 |
url |
https://archium.ateneo.edu/ecce-faculty-pubs/74 https://www.naun.org/main/NAUN/circuitssystemssignal/20-603.pdf |
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