Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
Modern embedded systems need to support multiple time-constrained multimedia applications that often employ multiprocessor-systems-on-chip (MPSoCs). Such systems need to be optimized for resource usage and energy consumption. It is well understood that a design-time approach cannot provide timing gu...
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sg-ntu-dr.10356-1004492020-05-28T07:17:15Z Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs Singh, Amit Kumar Kumar, Akash Srikanthan, Thambipillai School of Computer Engineering DRNTU::Engineering::Computer science and engineering Modern embedded systems need to support multiple time-constrained multimedia applications that often employ multiprocessor-systems-on-chip (MPSoCs). Such systems need to be optimized for resource usage and energy consumption. It is well understood that a design-time approach cannot provide timing guarantees for all the applications due to its inability to cater for dynamism in applications. However, a runtime approach consumes large computation requirements at runtime and hence may not lend well to constrained-aware mapping. In this article, we present a hybrid approach for efficient mapping of applications in such systems. For each application to be supported in the system, the approach performs extensive design-space exploration (DSE) at design time to derive multiple design points representing throughput and energy consumption at different resource combinations. One of these points is selected at runtime efficiently, depending upon the desired throughput while optimizing for energy consumption and resource usage. While most of the existing DSE strategies consider a fixed multiprocessor platform architecture, our DSE considers a generic architecture, making DSE results applicable to any target platform. All the compute-intensive analysis is performed during DSE, which leaves for minimum computation at runtime. The approach is capable of handling dynamism in applications by considering their runtime aspects and providing timing guarantees. The presented approach is used to carry out a DSE case study for models of real-life multimedia applications: H.263 decoder, H.263 encoder, MPEG-4 decoder, JPEG decoder, sample rate converter, and MP3 decoder. At runtime, the design points are used to map the applications on a heterogeneous MPSoC. Experimental results reveal that the proposed approach provides faster DSE, better design points, and efficient runtime mapping when compared to other approaches. In particular, we show that DSE is faster by 83% and runtime mapping is accelerated by 93% for some cases. Further, we study the scalability of the approach by considering applications with large numbers of tasks. 2013-07-05T04:22:30Z 2019-12-06T20:22:44Z 2013-07-05T04:22:30Z 2019-12-06T20:22:44Z 2012 2012 Journal Article Singh, A. K., Kumar, A., Srikanthan, T. (2012). Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs. ACM Transactions on Design Automation of Electronic Systems, 18(1). 1084-4309 https://hdl.handle.net/10356/100449 http://hdl.handle.net/10220/10991 10.1145/2390191.2390200 en ACM transactions on design automation of electronic systems © 2012 ACM. |
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DRNTU::Engineering::Computer science and engineering Singh, Amit Kumar Kumar, Akash Srikanthan, Thambipillai Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
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Modern embedded systems need to support multiple time-constrained multimedia applications that often employ multiprocessor-systems-on-chip (MPSoCs). Such systems need to be optimized for resource usage and energy consumption. It is well understood that a design-time approach cannot provide timing guarantees for all the applications due to its inability to cater for dynamism in applications. However, a runtime approach consumes large computation requirements at runtime and hence may not lend well to constrained-aware mapping.
In this article, we present a hybrid approach for efficient mapping of applications in such systems. For each application to be supported in the system, the approach performs extensive design-space exploration (DSE) at design time to derive multiple design points representing throughput and energy consumption at different resource combinations. One of these points is selected at runtime efficiently, depending upon the desired throughput while optimizing for energy consumption and resource usage. While most of the existing DSE strategies consider a fixed multiprocessor platform architecture, our DSE considers a generic architecture, making DSE results applicable to any target platform. All the compute-intensive analysis is performed during DSE, which leaves for minimum computation at runtime. The approach is capable of handling dynamism in applications by considering their runtime aspects and providing timing guarantees.
The presented approach is used to carry out a DSE case study for models of real-life multimedia applications: H.263 decoder, H.263 encoder, MPEG-4 decoder, JPEG decoder, sample rate converter, and MP3 decoder. At runtime, the design points are used to map the applications on a heterogeneous MPSoC. Experimental results reveal that the proposed approach provides faster DSE, better design points, and efficient runtime mapping when compared to other approaches. In particular, we show that DSE is faster by 83% and runtime mapping is accelerated by 93% for some cases. Further, we study the scalability of the approach by considering applications with large numbers of tasks. |
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School of Computer Engineering |
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School of Computer Engineering Singh, Amit Kumar Kumar, Akash Srikanthan, Thambipillai |
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Article |
author |
Singh, Amit Kumar Kumar, Akash Srikanthan, Thambipillai |
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Singh, Amit Kumar |
title |
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
title_short |
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
title_full |
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
title_fullStr |
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
title_full_unstemmed |
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs |
title_sort |
accelerating throughput-aware runtime mapping for heterogeneous mpsocs |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/100449 http://hdl.handle.net/10220/10991 |
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1681059379794673664 |