A FVF based output capacitorless LDO regulator with wide load capacitance range

An output capacitorless low-dropout (LDO) regulator, which applies the proposed Dual Summed Miller Frequency Compensation (DSMFC) on Flipped Voltage Follower (FVF) structure with composite power transistor, is proposed. Validated by UMC 65nm CMOS process, the simulation results have shown that the p...

Full description

Saved in:
Bibliographic Details
Main Authors: Chong, Sau Siong, Chan, Pak Kwong, Koay, K. C.
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2013
Subjects:
Online Access:https://hdl.handle.net/10356/101001
http://hdl.handle.net/10220/16695
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
Be the first to leave a comment!
You must be logged in first