Simulation of flash memory characteristics based on discrete nanoscale silicon

• Main Authors: New, C. L., Khor, T. S., Wong, Jen It, Yang, Ming, Chen, Tupei, Ng, Chi Yung
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2011
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/101421; http://hdl.handle.net/10220/6910
• Institution: Nanyang Technological University

In this paper, we present a simulation study on the trapping properties of flash memory device based on discrete nanoscale silicon embedded in silicon-dioxide (SiO2). Taurus Suprem-4 and Taurus Medici are being used to carry out the simulations. The memory structure with a tunnel oxide of 3, 5 and 9 nm and a control oxide of 10, 20 and 40 nm have been simulated, respectively. The discrete nanoscale silicon with the size of 20 nm times 20 nm, 10 nm times 10 nm, and 5 nm times 5 nm have also been simulated, respectively.