DELTRON : neuromorphic architectures for delay based learning

We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipl...

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Main Authors:	Hussain, Shaista, Basu, Arindam, Wang, Mark, Hamilton, Tara Julia
Other Authors:	School of Electrical and Electronic Engineering
Format:	Conference or Workshop Item
Language:	English
Published:	2013
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	https://hdl.handle.net/10356/101646 http://hdl.handle.net/10220/16341
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Institution:	Nanyang Technological University
Language:	English

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spelling	sg-ntu-dr.10356-1016462020-03-07T13:24:50Z DELTRON : neuromorphic architectures for delay based learning Hussain, Shaista Basu, Arindam Wang, Mark Hamilton, Tara Julia School of Electrical and Electronic Engineering IEEE Asia Pacific Conference on Circuits and Systems (2012 : Kaohsiung, Taiwan) DRNTU::Engineering::Electrical and electronic engineering We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture. Accepted version 2013-10-10T02:57:42Z 2019-12-06T20:42:08Z 2013-10-10T02:57:42Z 2019-12-06T20:42:08Z 2012 2012 Conference Paper Hussain, S., Basu, A., Wang, M., & Hamilton, T. J. (2012). DELTRON : neuromorphic architectures for delay based learning. 2012 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp.304-307. https://hdl.handle.net/10356/101646 http://hdl.handle.net/10220/16341 10.1109/APCCAS.2012.6419032 en © 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/APCCAS.2012.6419032]. application/pdf
institution	Nanyang Technological University
building	NTU Library
country	Singapore
collection	DR-NTU
language	English
topic	DRNTU::Engineering::Electrical and electronic engineering
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering Hussain, Shaista Basu, Arindam Wang, Mark Hamilton, Tara Julia DELTRON : neuromorphic architectures for delay based learning
description	We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Hussain, Shaista Basu, Arindam Wang, Mark Hamilton, Tara Julia
format	Conference or Workshop Item
author	Hussain, Shaista Basu, Arindam Wang, Mark Hamilton, Tara Julia
author_sort	Hussain, Shaista
title	DELTRON : neuromorphic architectures for delay based learning
title_short	DELTRON : neuromorphic architectures for delay based learning
title_full	DELTRON : neuromorphic architectures for delay based learning
title_fullStr	DELTRON : neuromorphic architectures for delay based learning
title_full_unstemmed	DELTRON : neuromorphic architectures for delay based learning
title_sort	deltron : neuromorphic architectures for delay based learning
publishDate	2013
url	https://hdl.handle.net/10356/101646 http://hdl.handle.net/10220/16341
_version_	1681045787888320512

DELTRON : neuromorphic architectures for delay based learning

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