An FPGA aligner for short read mapping

The rapid growth of short read datasets poses a new challenge to the mapping of short reads to a reference genome in terms of sensitivity and execution speed. In this work, we present a parallel architecture for short read mapping utilizing field programmable gate array (FPGA)-based hardware. The co...

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Main Authors: Chen, Yupeng, Schmidt, Bertil, Maksell, Douglas L.
Other Authors: School of Computer Engineering
Format: Conference or Workshop Item
Language:English
Published: 2013
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Online Access:https://hdl.handle.net/10356/101801
http://hdl.handle.net/10220/13121
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1018012020-05-28T07:17:45Z An FPGA aligner for short read mapping Chen, Yupeng Schmidt, Bertil Maksell, Douglas L. School of Computer Engineering International Conference on Field Programmable Logic and Applications (22nd : 2012 : Oslo, Norway) DRNTU::Engineering::Computer science and engineering The rapid growth of short read datasets poses a new challenge to the mapping of short reads to a reference genome in terms of sensitivity and execution speed. In this work, we present a parallel architecture for short read mapping utilizing field programmable gate array (FPGA)-based hardware. The computation intensive semi-global alignment and the hash table lookup operations are mapped onto an FPGA. The proposed Align Core is implemented with a parallel block structure to gain computational efficiency. We present a new parallel block-wise alignment structure to approximate the conventional dynamic programming algorithm. The performance of our FPGA aligner is compared to the GASSST and BWA software implementations. In terms of the overall execution time, our FPGA aligner achieves a speedup between 3.4 to 6.7 compared to GASSST with a comparable sensitivity and a speedup between 2.5 to 5.2 compared to BWA at a higher sensitivity. 2013-08-15T07:21:20Z 2019-12-06T20:44:42Z 2013-08-15T07:21:20Z 2019-12-06T20:44:42Z 2012 2012 Conference Paper https://hdl.handle.net/10356/101801 http://hdl.handle.net/10220/13121 10.1109/FPL.2012.6339267 en
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Computer science and engineering
spellingShingle DRNTU::Engineering::Computer science and engineering
Chen, Yupeng
Schmidt, Bertil
Maksell, Douglas L.
An FPGA aligner for short read mapping
description The rapid growth of short read datasets poses a new challenge to the mapping of short reads to a reference genome in terms of sensitivity and execution speed. In this work, we present a parallel architecture for short read mapping utilizing field programmable gate array (FPGA)-based hardware. The computation intensive semi-global alignment and the hash table lookup operations are mapped onto an FPGA. The proposed Align Core is implemented with a parallel block structure to gain computational efficiency. We present a new parallel block-wise alignment structure to approximate the conventional dynamic programming algorithm. The performance of our FPGA aligner is compared to the GASSST and BWA software implementations. In terms of the overall execution time, our FPGA aligner achieves a speedup between 3.4 to 6.7 compared to GASSST with a comparable sensitivity and a speedup between 2.5 to 5.2 compared to BWA at a higher sensitivity.
author2 School of Computer Engineering
author_facet School of Computer Engineering
Chen, Yupeng
Schmidt, Bertil
Maksell, Douglas L.
format Conference or Workshop Item
author Chen, Yupeng
Schmidt, Bertil
Maksell, Douglas L.
author_sort Chen, Yupeng
title An FPGA aligner for short read mapping
title_short An FPGA aligner for short read mapping
title_full An FPGA aligner for short read mapping
title_fullStr An FPGA aligner for short read mapping
title_full_unstemmed An FPGA aligner for short read mapping
title_sort fpga aligner for short read mapping
publishDate 2013
url https://hdl.handle.net/10356/101801
http://hdl.handle.net/10220/13121
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