Complementary logic gate arrays based on carbon nanotube network transistors
An efficient technique of fabricating high performance n- and p- type single-walled carbon nanotube (SWNT) network field-effect transistors (NET-FETs) is successfully demonstrated. Complementary inverters, NOR, NAND, OR, AND logic gates have been achieved from integrating these p- and n-type SWNT-NE...
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sg-ntu-dr.10356-1022402020-03-07T14:02:43Z Complementary logic gate arrays based on carbon nanotube network transistors Gao, Pingqi Zou, Jianping Li, Hong Zhang, Kang Zhang, Qing School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering An efficient technique of fabricating high performance n- and p- type single-walled carbon nanotube (SWNT) network field-effect transistors (NET-FETs) is successfully demonstrated. Complementary inverters, NOR, NAND, OR, AND logic gates have been achieved from integrating these p- and n-type SWNT-NET-FETs. The processing technique described here is fully compatible with conventional silicon microelectronic technologies and it is readily suitable for scalable integration. 2014-03-20T08:27:39Z 2019-12-06T20:52:07Z 2014-03-20T08:27:39Z 2019-12-06T20:52:07Z 2013 2013 Journal Article Gao, P., Zou, J., Li, H., Zhang, K., & Zhang, Q. (2013). Complementary logic gate arrays based on carbon nanotube network transistors. Small, 9(6), 813-819. 1613-6810 https://hdl.handle.net/10356/102240 http://hdl.handle.net/10220/18923 10.1002/smll.201201237 en Small © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. |
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DRNTU::Engineering::Electrical and electronic engineering Gao, Pingqi Zou, Jianping Li, Hong Zhang, Kang Zhang, Qing Complementary logic gate arrays based on carbon nanotube network transistors |
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An efficient technique of fabricating high performance n- and p- type single-walled carbon nanotube (SWNT) network field-effect transistors (NET-FETs) is successfully demonstrated. Complementary inverters, NOR, NAND, OR, AND logic gates have been achieved from integrating these p- and n-type SWNT-NET-FETs. The processing technique described here is fully compatible with conventional silicon microelectronic technologies and it is readily suitable for scalable integration. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Gao, Pingqi Zou, Jianping Li, Hong Zhang, Kang Zhang, Qing |
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Article |
author |
Gao, Pingqi Zou, Jianping Li, Hong Zhang, Kang Zhang, Qing |
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Gao, Pingqi |
title |
Complementary logic gate arrays based on carbon nanotube network transistors |
title_short |
Complementary logic gate arrays based on carbon nanotube network transistors |
title_full |
Complementary logic gate arrays based on carbon nanotube network transistors |
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Complementary logic gate arrays based on carbon nanotube network transistors |
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Complementary logic gate arrays based on carbon nanotube network transistors |
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complementary logic gate arrays based on carbon nanotube network transistors |
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2014 |
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https://hdl.handle.net/10356/102240 http://hdl.handle.net/10220/18923 |
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1681038436749803520 |