RNS encoding based folding ADC

• Main Authors: Vun, C. H., Premkumar, A. B.
• Other Authors: School of Computer Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2013
• Subjects: DRNTU::Engineering::Computer science and engineering
• Online Access: https://hdl.handle.net/10356/102833; http://hdl.handle.net/10220/16934
• Institution: Nanyang Technological University

This paper presents a novel encoding scheme based on the residue number systems for folding ADC to enable highly efficient hardware implementation of high speed, high resolution ADC. The input analog signal is folded by multiple groups of zero-crossing based folding circuits of different folding factors corresponding to the moduli used for their implementation. Each group of folding circuits in turn contains multiple parallel zero-crossing based folding circuits of same folding factor, but with their outputs phase shifted with respect to one another such that their collective output bits pattern form a residue of the modulus of the group. Multiple groups of folding circuits with different moduli that are relatively prime to each other are then combined in parallel. When taken together, their digital outputs form residue digits of a relatively prime moduli set that allows unique representation of the input signal magnitude over a dynamic range that is equal to the product of the moduli used in the different groups in the ADC.