Single-stage and cascade design of high order multiplierless linear phase FIR filters using genetic algorithm

In this work, a novel genetic algorithm (GA) is proposed for the design of multiplierless linear phase finite impulse response (FIR) filters. The filters under consideration are of high order and wide coefficient wordlength. Both the single-stage and cascade form are considered. In a practical filte...

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Bibliographic Details
Main Authors: Ye, Wen Bin, Yu, Ya Jun
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2014
Subjects:
Online Access:https://hdl.handle.net/10356/103634
http://hdl.handle.net/10220/19333
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Institution: Nanyang Technological University
Language: English
Description
Summary:In this work, a novel genetic algorithm (GA) is proposed for the design of multiplierless linear phase finite impulse response (FIR) filters. The filters under consideration are of high order and wide coefficient wordlength. Both the single-stage and cascade form are considered. In a practical filter design problem, when the filter specification is stringent, requiring high filter order and wide coefficient wordlength, GAs often fail to find feasible solutions, because the discrete search space thus constructed is huge and the majority of the solution candidates therein can not meet the specification. In the proposed GA, the discrete search space is partitioned into smaller ones. Each small space is constructed surrounding a base discrete coefficient set which is obtained by a proposed greedy algorithm. The partition of the search space increases the chances for the GA to find feasible solutions, but does not sacrifice the coverage of the search. The proposed GA applies to the design of single-stage filters. When a cascade form filter is designed, for each single-stage filter meeting the filter specification generated during the course of GA, an integer polynomial factorization is applied. Design examples show that the proposed GA significantly outperforms existing algorithms dealing with the similar problems in terms of design time, and the hardware cost is saved in most cases.