Novel design algorithm for low complexity programmable FIR filters based on extended double base number system

Coefficient multipliers are the stumbling blocks in programmable finite impulse response (FIR) digital filters. As the filter coefficients change either dynamically or periodically, the search for common subexpressions for multiplierless implementation needs to be performed over the entire gamut of...

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Bibliographic Details
Main Authors: Chen, Jiajia, Chang, Chip-Hong, Feng, Feng, Ding, Weiao, Ding, Jiatao
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/105045
http://hdl.handle.net/10220/25027
http://dx.doi.org/10.1109/TCSI.2014.2348072
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Institution: Nanyang Technological University
Language: English
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Summary:Coefficient multipliers are the stumbling blocks in programmable finite impulse response (FIR) digital filters. As the filter coefficients change either dynamically or periodically, the search for common subexpressions for multiplierless implementation needs to be performed over the entire gamut of integers of the desired precision, and the amount of shifts associated with each identified common subexpression needs to be memorized. The complexity of a quality search is thus beyond the existing design algorithms based on conventional binary and signed digit representations. This paper presents a new design paradigm for the programmable FIR filters by exploiting the extended double base number system (EDBNS). Due to its sparsity and innate abstraction of the sum of binary shifted partial products, the sharing of adders in the time-multiplexed multiple constant multiplication block of the programmable FIR filters can be maximized by a direct mapping from the quasi-minimum EDBNS. The multiplexing cost can be further reduced by merging double base terms. Logic synthesis results on more than one hundred programmable filters with filter taps ranging from 10 to 100 and coefficient word lengths of 8, 12, and 16 bits show that the average logic complexity and critical path delay of the programmable FIR filters designed by our proposed algorithm have been reduced by up to 47.81% and 14.32%, respectively over the existing design methods.