FCUDA : CUDA to FPGA high level synthesis
This paper serves as a record of debugging the existing CUDA-to-FPGA tool flow (FCUDA) with various benchmarks in order to improve its robustness and efficiency. The paper starts with a brief introduction about the tool, its infrastructure, impact and role to the computing world nowadays. The body o...
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| Language: | English |
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2015
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| Online Access: | https://hdl.handle.net/10356/105735 http://hdl.handle.net/10220/26042 |
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sg-ntu-dr.10356-1057352020-09-27T20:27:04Z FCUDA : CUDA to FPGA high level synthesis Nguyen, Quoc Duy Tan Kyle Rupnow School of Computer Engineering DRNTU::Engineering::Computer science and engineering::Data::Data structures This paper serves as a record of debugging the existing CUDA-to-FPGA tool flow (FCUDA) with various benchmarks in order to improve its robustness and efficiency. The paper starts with a brief introduction about the tool, its infrastructure, impact and role to the computing world nowadays. The body of the paper mainly consists of the methodology the author used when testing FCUDA. It also notes all the bugs the author has possibly found and proposed some workable solutions to them. Different existing FCUDA versions will also be discussed. Finally, it concludes with some points for future work and enhancement. 2015-06-23T08:37:33Z 2019-12-06T21:56:53Z 2015-06-23T08:37:33Z 2019-12-06T21:56:53Z 2014 2014 Student Research Paper Nguyen, Q. D. T. (2014). FCUDA : CUDA to FPGA high level synthesis. Student research paper, Nanyang Technological University. https://hdl.handle.net/10356/105735 http://hdl.handle.net/10220/26042 en © 2014 The Author(s). 5 p. application/pdf |
| institution |
Nanyang Technological University |
| building |
NTU Library |
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Singapore |
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DR-NTU |
| language |
English |
| topic |
DRNTU::Engineering::Computer science and engineering::Data::Data structures |
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DRNTU::Engineering::Computer science and engineering::Data::Data structures Nguyen, Quoc Duy Tan FCUDA : CUDA to FPGA high level synthesis |
| description |
This paper serves as a record of debugging the existing CUDA-to-FPGA tool flow (FCUDA) with various benchmarks in order to improve its robustness and efficiency. The paper starts with a brief introduction about the tool, its infrastructure, impact and role to the computing world nowadays. The body of the paper mainly consists of the methodology the author used when testing FCUDA. It also notes all the bugs the author has possibly found and proposed some workable solutions to them. Different existing FCUDA versions will also be discussed. Finally, it concludes with some points for future work and enhancement. |
| author2 |
Kyle Rupnow |
| author_facet |
Kyle Rupnow Nguyen, Quoc Duy Tan |
| format |
Student Research Paper |
| author |
Nguyen, Quoc Duy Tan |
| author_sort |
Nguyen, Quoc Duy Tan |
| title |
FCUDA : CUDA to FPGA high level synthesis |
| title_short |
FCUDA : CUDA to FPGA high level synthesis |
| title_full |
FCUDA : CUDA to FPGA high level synthesis |
| title_fullStr |
FCUDA : CUDA to FPGA high level synthesis |
| title_full_unstemmed |
FCUDA : CUDA to FPGA high level synthesis |
| title_sort |
fcuda : cuda to fpga high level synthesis |
| publishDate |
2015 |
| url |
https://hdl.handle.net/10356/105735 http://hdl.handle.net/10220/26042 |
| _version_ |
1681058470423429120 |