Low-power, adaptive neuromorphic systems : recent progress and future directions

• Main Authors: Basu, Arindam, Acharya, Jyotibdha, Karnik, Tanay, Liu, Huichu, Li, Hai, Seo, Jae-Sun, Song, Chang
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2019
• Subjects: Neuromorphics; Engineering::Electrical and electronic engineering; Hardware
• Online Access: https://hdl.handle.net/10356/106809; http://hdl.handle.net/10220/49651; http://dx.doi.org/10.1109/JETCAS.2018.2816339
• Institution: Nanyang Technological University

In this paper, we present a survey of recent works in developing neuromorphic or neuro-inspired hardware systems. In particular, we focus on those systems which can either learn from data in an unsupervised or online supervised manner. We present algorithms and architectures developed specially to support on-chip learning. Emphasis is placed on hardware friendly modifications of standard algorithms, such as backpropagation, as well as novel algorithms, such as structural plasticity, developed specially for low-resolution synapses. We cover works related to both spike-based and more traditional non-spike-based algorithms. This is followed by developments in novel devices, such as floating-gate MOS, memristors, and spintronic devices. CMOS circuit innovations for on-chip learning and CMOS interface circuits for post-CMOS devices, such as memristors, are presented. Common architectures, such as crossbar or island style arrays, are discussed, along with their relative merits and demerits. Finally, we present some possible applications of neuromorphic hardware, such as brain-machine interfaces, robotics, etc., and identify future research trends in the field.