A low-power reliability enhanced arbiter physical unclonable function based on current starved multiplexers

• Main Authors: Wang, Si, Cao, Yuan, Chang, Chip-Hong
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2020
• Subjects: Engineering::Electrical and electronic engineering::Integrated circuits; Hardware Security; Physical Unclonable Function
• Online Access: https://hdl.handle.net/10356/137082; https://doi.org/10.21979/N9/MWVFNO
• Institution: Nanyang Technological University

Arbiter Physical Unclonable Function (APUF) is a popular lightweight strong PUF. The most criticized operational deficiency of APUF over other strong PUFs is its reliability against temperature and supply variations. In this paper, a novel low-power current starved (CS) multiplexer (MUX) based strong PUF is proposed. CS-MUX harnesses greater stochastic delay distribution from the manufacturing process variation than the CS inverter and regular MUX. Its output current can be controlled by a current mirror to minimize the energy consumption while desentizing the delay deviation against environmental variations. The proposed PUF design is simulated using 65nm CMOS technology. The results show that the power consumption of a 64-stage current starved MUX based PUF under nominal condition is only 2.1μW per challenge-response pair (CRP) at frequency of 20MHz which is equivalent to 0.105pJ per cycle. It has a reduction of 96.3% and 96.2% in energy per cycle compared with regular arbiter based and CS inverter based PUFs, respectively. Its worst-case reliability is 94.64% over a temperature range of -5 ∼ 100 °C, which are 14.52% and 8.32% more reliable than regular arbiter based and CS inverter based PUFs, respectively. Its worst-case reliability over a supply voltage range of 1.1 ∼ 1.3V is 95.51%, which are 6% and 4.5% better than regular arbiter based and CS inverter based PUFs, respectively.