A template-based technique for efficient Clifford+T-based quantum circuit implementation

• Main Authors: Biswal, Laxmidhar, Das, Rakesh, Bandyopadhyay, Chandan, Chattopadhyay, Anupam, Rahaman, Hafizur
• Other Authors: School of Computer Science and Engineering
• Format: Article
• Language: English
• Published: 2020
• Subjects: Engineering::Computer science and engineering; BDD; Clifford+T
• Online Access: https://hdl.handle.net/10356/139091
• Institution: Nanyang Technological University

The near-future possibility of Quantum supremacy, which aspires to establish a set of algorithms running efficiently on a Quantum computer – have significantly fuelled the interest in design and automation of Quantum circuits. Multiple technologies such as Ion-Trap, Nuclear Magnetic Resonance (NMR), have made great progress in recent years towards a practical Quantum circuit implementation. For all these technologies, in order to suppress the inherent computation noise, fault-tolerance is a desirable feature. Fault tolerance is achieved by Quantum error correction codes, such as surface code. Due to the efficient realization of surface codes using Clifford + T gate library of Quantum logic gates, it is now becoming de facto gate library for Quantum circuit implementation. In this paper, we improve two key performance metrics, T − depth and T − count, for Quantum circuit realization using Clifford + T gates. In contrast with the previous approaches, we have incorporated two techniques - 1) restructuring of the gate positions in the designs to make it amenable towards a lower T − depth 2) using Binary Decision Diagrams (BDD) as an intermediate representation for achieving scalability. To validate our proposed optimizations, we have tested a wide spectrum of benchmarks, registering an average improvement of 74% and 21% on T − depth and T − count in compared works.