Platform development using MATLAB for Analog-To-Digital Converter IC measurement

With the ever-evolving signal processing, digital circuit processing requires the mounting requirements of Analog-to-Digital Converters (ADCs). Often, there is a need for an ADC that is of high speed with a good dynamic range and accuracy for optimum performance. There has been a rising use of Sigma...

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Bibliographic Details
Main Author: Chow, Lercy
Other Authors: Goh Wang Ling
Format: Final Year Project
Language:English
Published: Nanyang Technological University 2020
Subjects:
Online Access:https://hdl.handle.net/10356/139625
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Institution: Nanyang Technological University
Language: English
Description
Summary:With the ever-evolving signal processing, digital circuit processing requires the mounting requirements of Analog-to-Digital Converters (ADCs). Often, there is a need for an ADC that is of high speed with a good dynamic range and accuracy for optimum performance. There has been a rising use of Sigma-Delta ADCs for communication and electronics applications due to the advantages that come with using it. [1] This report is a documentation of a Final Year Project (FYP). The aim is to develop an application with Graphical User Interface (GUI) for testing ADC performance based on the raw data measurements collected from the IC chips. Various test functions had been implemented. They are the least square fitting, histogram test and the Fast Fourier Transform test. All of which provide results that are useful for the circuit designer to analyze if the ADC of interest is working as desired. In this project, a 2nd order feedforward incremental sigma-delta ADC had been evaluated. From the simulation results, the user can better infer the performance of the specific sigma-delta ADC. Through the UI, the circuit designer is able to vary the parameters and coefficients to obtain the ideal settings for an optimized sigma-delta ADC performance. Other than the simulation functions, the application also allow users to observe the effects of circuit and architecture design’s limitations on 2nd order sigma-delta modulators. The few design limits that the application is able to evaluate are; finite operational-amplifier (op-amp) gain, finite op-amp bandwidth, finite slew rate and the integrator dynamic range. The different effects can be selected through the UI. The simulated results allow the user to gather knowledge and issues that are related to both the circuit and architecture designs. This data aids the circuit designer in their designing of say a sigma-delta modulator. This report will cover the process of achieving the goal of the project to obtain a fully developed application.