A fast approach for generating efficient parsers on FPGAs

• المؤلفون الرئيسيون: Cao, Zhuang, Zhang, Huiguo, Li, Junnan, Wen, Mei, Zhang, Chunyuan
• مؤلفون آخرون: School of Computer Science and Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2020
• الموضوعات: Engineering::Computer science and engineering; Packet Parser; Pipeline
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/142820
• المؤسسة: Nanyang Technological University

The development of modern networking requires that high-performance network processors be designed quickly and efficiently to support new protocols. As a very important part of the processor, the parser parses the headers of the packets-this is the precondition for further processing and finally for...