A fast approach for generating efficient parsers on FPGAs
The development of modern networking requires that high-performance network processors be designed quickly and efficiently to support new protocols. As a very important part of the processor, the parser parses the headers of the packets-this is the precondition for further processing and finally for...
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| Main Authors: | , , , , |
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| 其他作者: | |
| 格式: | Article |
| 語言: | English |
| 出版: |
2020
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/142820 |
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