Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers

The demand for low resource devices has increased rapidly due to the advancements in Internet-of-things applications. These devices operate in environments that have limited resources. To ensure security, stream ciphers are implemented on hardware due to their speed and simplicity. Amongst different...

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Main Authors: Alharbi, Fares, Muhammad Khurram Hameed, Chowdhury, Anusha, Khalid, Ayesha, Chattopadhyay, Anupam, Ibrahim Tariq Javed
Other Authors: School of Computer Science and Engineering
Format: Article
Language:English
Published: 2021
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Online Access:https://hdl.handle.net/10356/148698
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-1486982021-05-31T08:41:50Z Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers Alharbi, Fares Muhammad Khurram Hameed Chowdhury, Anusha Khalid, Ayesha Chattopadhyay, Anupam Ibrahim Tariq Javed School of Computer Science and Engineering Engineering::Computer science and engineering Cryptography Stream Cipher The demand for low resource devices has increased rapidly due to the advancements in Internet-of-things applications. These devices operate in environments that have limited resources. To ensure security, stream ciphers are implemented on hardware due to their speed and simplicity. Amongst different stream ciphers, the eSTREAM ciphers stand due to their frugal implementations. This work probes the effect of unrolling on the efficiency of eSTREAM ciphers, including Trivium, Grain (Grain 80 and Grain 128) and MICKEY (MICKEY 2.0 and MICKEY-128 2.0). It addresses the question of optimal unrolling for designing high-performance stream ciphers. The increase in the area consumption is also bench-marked. The analysis is conducted to identify efficient design principles for ciphers. We experimentally show that the resulting performance after unrolling may disagree with the theoretical prediction when the effects of technology library are considered. We report pre-layout synthesis results on 65 and 130 nm ASIC technology as well as synthesis results for Xilinx FPGA platform in support of our claim. Based on our findings, cipher design and implementation suggestions are proposed to aid hardware designers. Furthermore, we explore why and where area-efficiency for these ciphers saturate. Published version 2021-05-31T08:41:50Z 2021-05-31T08:41:50Z 2020 Journal Article Alharbi, F., Muhammad Khurram Hameed, Chowdhury, A., Khalid, A., Chattopadhyay, A. & Ibrahim Tariq Javed (2020). Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers. Electronics, 9(11). https://dx.doi.org/10.3390/electronics9111935 2079-9292 https://hdl.handle.net/10356/148698 10.3390/electronics9111935 2-s2.0-85096220052 11 9 en Electronics © 2020 The Author(s). Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/). application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Computer science and engineering
Cryptography
Stream Cipher
spellingShingle Engineering::Computer science and engineering
Cryptography
Stream Cipher
Alharbi, Fares
Muhammad Khurram Hameed
Chowdhury, Anusha
Khalid, Ayesha
Chattopadhyay, Anupam
Ibrahim Tariq Javed
Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
description The demand for low resource devices has increased rapidly due to the advancements in Internet-of-things applications. These devices operate in environments that have limited resources. To ensure security, stream ciphers are implemented on hardware due to their speed and simplicity. Amongst different stream ciphers, the eSTREAM ciphers stand due to their frugal implementations. This work probes the effect of unrolling on the efficiency of eSTREAM ciphers, including Trivium, Grain (Grain 80 and Grain 128) and MICKEY (MICKEY 2.0 and MICKEY-128 2.0). It addresses the question of optimal unrolling for designing high-performance stream ciphers. The increase in the area consumption is also bench-marked. The analysis is conducted to identify efficient design principles for ciphers. We experimentally show that the resulting performance after unrolling may disagree with the theoretical prediction when the effects of technology library are considered. We report pre-layout synthesis results on 65 and 130 nm ASIC technology as well as synthesis results for Xilinx FPGA platform in support of our claim. Based on our findings, cipher design and implementation suggestions are proposed to aid hardware designers. Furthermore, we explore why and where area-efficiency for these ciphers saturate.
author2 School of Computer Science and Engineering
author_facet School of Computer Science and Engineering
Alharbi, Fares
Muhammad Khurram Hameed
Chowdhury, Anusha
Khalid, Ayesha
Chattopadhyay, Anupam
Ibrahim Tariq Javed
format Article
author Alharbi, Fares
Muhammad Khurram Hameed
Chowdhury, Anusha
Khalid, Ayesha
Chattopadhyay, Anupam
Ibrahim Tariq Javed
author_sort Alharbi, Fares
title Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
title_short Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
title_full Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
title_fullStr Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
title_full_unstemmed Analysis of area-efficiency vs. unrolling for eSTREAM hardware portfolio stream ciphers
title_sort analysis of area-efficiency vs. unrolling for estream hardware portfolio stream ciphers
publishDate 2021
url https://hdl.handle.net/10356/148698
_version_ 1702418236962766848