Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform

Encryption is a function that is essential in today’s ever growing technological environment. The Advance Encryption Standard has been the most important and widely used cryptography algorithm in the world ever since it was first endorsed by the National Institutes of Standard and Technology. Howeve...

Full description

Saved in:

Bibliographic Details
Main Author:	Lai, Bo Liang
Other Authors:	Gwee Bah Hwee
Format:	Final Year Project
Language:	English
Published:	Nanyang Technological University 2021
Subjects:	Engineering::Electrical and electronic engineering
Online Access:	https://hdl.handle.net/10356/149987
Tags:	Add Tag No Tags, Be the first to tag this record!
Institution:	Nanyang Technological University
Language:	English

id	sg-ntu-dr.10356-149987
record_format	dspace
spelling	sg-ntu-dr.10356-1499872023-07-07T18:02:59Z Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform Lai, Bo Liang Gwee Bah Hwee School of Electrical and Electronic Engineering Ho Weng Geng ebhgwee@ntu.edu.sg, WGHo@ntu.edu.sg Engineering::Electrical and electronic engineering Encryption is a function that is essential in today’s ever growing technological environment. The Advance Encryption Standard has been the most important and widely used cryptography algorithm in the world ever since it was first endorsed by the National Institutes of Standard and Technology. However, despite its popularity in various industries applications, Side Channel Attack (SCA) can obtain the secret key used during the AES encryption process. SCA came in various forms ranging from electromagnetic to Power Analysis. The Correlation Power Attack, a form of SCA will be conducted in this project to analyze the vulnerability of AES to SCA. This project aims to implement an AES algorithm into the Field Programmable Gate Array (FPGA) Board to form a cryptographic device. Bachelor of Engineering (Electrical and Electronic Engineering) 2021-06-10T01:51:07Z 2021-06-10T01:51:07Z 2021 Final Year Project (FYP) Lai, B. L. (2021). Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform. Final Year Project (FYP), Nanyang Technological University, Singapore. https://hdl.handle.net/10356/149987 https://hdl.handle.net/10356/149987 en A2077-201 application/pdf Nanyang Technological University
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
language	English
topic	Engineering::Electrical and electronic engineering
spellingShingle	Engineering::Electrical and electronic engineering Lai, Bo Liang Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
description	Encryption is a function that is essential in today’s ever growing technological environment. The Advance Encryption Standard has been the most important and widely used cryptography algorithm in the world ever since it was first endorsed by the National Institutes of Standard and Technology. However, despite its popularity in various industries applications, Side Channel Attack (SCA) can obtain the secret key used during the AES encryption process. SCA came in various forms ranging from electromagnetic to Power Analysis. The Correlation Power Attack, a form of SCA will be conducted in this project to analyze the vulnerability of AES to SCA. This project aims to implement an AES algorithm into the Field Programmable Gate Array (FPGA) Board to form a cryptographic device.
author2	Gwee Bah Hwee
author_facet	Gwee Bah Hwee Lai, Bo Liang
format	Final Year Project
author	Lai, Bo Liang
author_sort	Lai, Bo Liang
title	Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
title_short	Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
title_full	Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
title_fullStr	Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
title_full_unstemmed	Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform
title_sort	implementation of asynchronous-logic aes algorithm and simulation of side-channel attacks on xilinx fpga platform
publisher	Nanyang Technological University
publishDate	2021
url	https://hdl.handle.net/10356/149987
_version_	1772826857028190208

Implementation of asynchronous-logic AES algorithm and simulation of side-channel attacks on Xilinx FPGA platform

Similar Items