Low voltage low power output programmable OCL-LDO with embedded voltage reference

The low voltage low power output-capacitorless (OCL) low dropout regulator (LDO) with embedded voltage reference (EVR) with adjustable and programmable output voltage is proposed in this paper. With the proposed design, the embedded voltage reference (EVR) LDO can provide desired output voltages of...

Full description

Saved in:
Bibliographic Details
Main Authors: Nardi, Utomo, Teo, Terence Boon Chiat, Lim, Xian Yang, Venkadasamy, Navaneethan, Liu, Ziming, Tan, Chong Boon, Seah, Bryan Yun Da, Lam, Yvonne Ying Hung, Siek, Liter
Other Authors: School of Electrical and Electronic Engineering
Format: Conference or Workshop Item
Language:English
Published: 2021
Subjects:
LDO
Online Access:https://hdl.handle.net/10356/152063
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-152063
record_format dspace
spelling sg-ntu-dr.10356-1520632021-07-16T01:54:37Z Low voltage low power output programmable OCL-LDO with embedded voltage reference Nardi, Utomo Teo, Terence Boon Chiat Lim, Xian Yang Venkadasamy, Navaneethan Liu, Ziming Tan, Chong Boon Seah, Bryan Yun Da Lam, Yvonne Ying Hung Siek, Liter School of Electrical and Electronic Engineering 2021 IEEE International Symposium on Circuits and Systems (ISCAS) VIRTUS, IC Design Centre of Excellence Engineering::Electrical and electronic engineering LDO Low Voltage Low Power The low voltage low power output-capacitorless (OCL) low dropout regulator (LDO) with embedded voltage reference (EVR) with adjustable and programmable output voltage is proposed in this paper. With the proposed design, the embedded voltage reference (EVR) LDO can provide desired output voltages of 435mV, 500mV, 550mV, and 600mV in single LDO design. The dropout voltage is 60mV for low power consumption. The proposed circuit is implemented and simulated in 55nm CMOS technology. The circuit consumes 30μA of quiescent current and 0.0234mm 2 chip area. Simulation results show that the line regulation is below 12.5mV/V, load regulation is below 2.6mV/mA and temperature coefficient (TC) is below 59ppm/ o C under all different output voltage modes of the LDO. Stability of the proposed design is also verified in simulation. The design also has fast transient recovery time of less than 1.67μs under 100ns rise/fall time load current transient. We would like to thank GlobalFoundries for funding the chip fabrication and testing. 2021-07-15T02:38:23Z 2021-07-15T02:38:23Z 2021 Conference Paper Nardi, U., Teo, T. B. C., Lim, X. Y., Venkadasamy, N., Liu, Z., Tan, C. B., Seah, B. Y. D., Lam, Y. Y. H. & Siek, L. (2021). Low voltage low power output programmable OCL-LDO with embedded voltage reference. 2021 IEEE International Symposium on Circuits and Systems (ISCAS). https://dx.doi.org/10.1109/ISCAS51556.2021.9401466 2158-1525 https://hdl.handle.net/10356/152063 10.1109/ISCAS51556.2021.9401466 en © 2021 Institute of Electrical and Electronics Engineers (IEEE). All rights reserved.
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic Engineering::Electrical and electronic engineering
LDO
Low Voltage Low Power
spellingShingle Engineering::Electrical and electronic engineering
LDO
Low Voltage Low Power
Nardi, Utomo
Teo, Terence Boon Chiat
Lim, Xian Yang
Venkadasamy, Navaneethan
Liu, Ziming
Tan, Chong Boon
Seah, Bryan Yun Da
Lam, Yvonne Ying Hung
Siek, Liter
Low voltage low power output programmable OCL-LDO with embedded voltage reference
description The low voltage low power output-capacitorless (OCL) low dropout regulator (LDO) with embedded voltage reference (EVR) with adjustable and programmable output voltage is proposed in this paper. With the proposed design, the embedded voltage reference (EVR) LDO can provide desired output voltages of 435mV, 500mV, 550mV, and 600mV in single LDO design. The dropout voltage is 60mV for low power consumption. The proposed circuit is implemented and simulated in 55nm CMOS technology. The circuit consumes 30μA of quiescent current and 0.0234mm 2 chip area. Simulation results show that the line regulation is below 12.5mV/V, load regulation is below 2.6mV/mA and temperature coefficient (TC) is below 59ppm/ o C under all different output voltage modes of the LDO. Stability of the proposed design is also verified in simulation. The design also has fast transient recovery time of less than 1.67μs under 100ns rise/fall time load current transient.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Nardi, Utomo
Teo, Terence Boon Chiat
Lim, Xian Yang
Venkadasamy, Navaneethan
Liu, Ziming
Tan, Chong Boon
Seah, Bryan Yun Da
Lam, Yvonne Ying Hung
Siek, Liter
format Conference or Workshop Item
author Nardi, Utomo
Teo, Terence Boon Chiat
Lim, Xian Yang
Venkadasamy, Navaneethan
Liu, Ziming
Tan, Chong Boon
Seah, Bryan Yun Da
Lam, Yvonne Ying Hung
Siek, Liter
author_sort Nardi, Utomo
title Low voltage low power output programmable OCL-LDO with embedded voltage reference
title_short Low voltage low power output programmable OCL-LDO with embedded voltage reference
title_full Low voltage low power output programmable OCL-LDO with embedded voltage reference
title_fullStr Low voltage low power output programmable OCL-LDO with embedded voltage reference
title_full_unstemmed Low voltage low power output programmable OCL-LDO with embedded voltage reference
title_sort low voltage low power output programmable ocl-ldo with embedded voltage reference
publishDate 2021
url https://hdl.handle.net/10356/152063
_version_ 1707050444550832128