A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design

• Main Authors: Li Kan, Zheng, Yuanjin, Siek, Liter
• Other Authors: School of Electrical and Electronic Engineering
• Format: Article
• Language: English
• Published: 2021
• Subjects: Engineering::Electrical and electronic engineering; Linear Regulator; High Output Swing Buffer; Power FET; Loop Stability; Offset Trim
• Online Access: https://hdl.handle.net/10356/152320
• Institution: Nanyang Technological University

A low-dropout regulator (LDO) for portable application with a high output swing and dynamic biased impedance-attenuation buffer is presented in this paper. The proposed buffer pushes the dominated pole introduced by the LDO's power FET to higher frequency without consuming large quiescent current. The LDO loop with only one dominant pole within unity gain loop bandwidth is realized. A dynamic current sensing circuit is adopted to make the design more robust. The buffer features a rail-to-rail swing which makes the LDO's power FET size smaller than traditional buffer design for the same current deliverability. A low cost method for trimming is introduced to achieve high yield suitable for commercial design. The LDO has been fabricated in a 0.18 µm HV CMOS process. It draws a total current of 40 µA and is able to deliver up to 600 mA of load current. The proposed method for trimming allows for a high yield of approaching 100%, with line/load regulation error <2%, and the maximum transient output voltage variation of 3% with a load step from 1 mA to 600 mA in 100 ns.