Liang, Y., Boon, C. C., Chen, Q., & Engineering, S. o. E. a. E. (2022). A 23.4 mW -72-dBc reference spur 40 GHz CMOS PLL featuring a spur-compensation phase detector.
Chicago Style CitationLiang, Yuan, Chirn Chye Boon, Qian Chen, and School of Electrical and Electronic Engineering. A 23.4 MW -72-dBc Reference Spur 40 GHz CMOS PLL Featuring a Spur-compensation Phase Detector. 2022.
MLA引文Liang, Yuan, Chirn Chye Boon, Qian Chen, and School of Electrical and Electronic Engineering. A 23.4 MW -72-dBc Reference Spur 40 GHz CMOS PLL Featuring a Spur-compensation Phase Detector. 2022.
警告:這些引文格式不一定是100%准確.